diff options
| author | Sergey <37293587+SergeyDegtyar@users.noreply.github.com> | 2019-08-29 21:07:34 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-29 21:07:34 +0300 |
| commit | d360693040dda29aba4ef2583e522c6ab88a4961 (patch) | |
| tree | 3de073925c8e3a4a613303ea807aeef12949a3d7 /techlibs/anlogic/synth_anlogic.cc | |
| parent | d588c6898fb7cfebe52a71a48d6fb21d1623e61b (diff) | |
| parent | b8a9f73089234ed699a4057b50fd739a90abea43 (diff) | |
| download | yosys-d360693040dda29aba4ef2583e522c6ab88a4961.tar.gz yosys-d360693040dda29aba4ef2583e522c6ab88a4961.tar.bz2 yosys-d360693040dda29aba4ef2583e522c6ab88a4961.zip | |
Merge pull request #3 from YosysHQ/Sergey/tests_ice40
Merge my changes to tests_ice40 branch
Diffstat (limited to 'techlibs/anlogic/synth_anlogic.cc')
| -rw-r--r-- | techlibs/anlogic/synth_anlogic.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/techlibs/anlogic/synth_anlogic.cc b/techlibs/anlogic/synth_anlogic.cc index 620bf3965..b87fc8566 100644 --- a/techlibs/anlogic/synth_anlogic.cc +++ b/techlibs/anlogic/synth_anlogic.cc @@ -154,7 +154,7 @@ struct SynthAnlogicPass : public ScriptPass { run("memory_bram -rules +/anlogic/drams.txt"); run("techmap -map +/anlogic/drams_map.v"); - run("anlogic_determine_init"); + run("setundef -zero -params t:EG_LOGIC_DRAM16X4"); } if (check_label("fine")) @@ -186,6 +186,11 @@ struct SynthAnlogicPass : public ScriptPass { run("techmap -map +/anlogic/cells_map.v"); run("clean"); + } + + if (check_label("map_anlogic")) + { + run("anlogic_fixcarry"); run("anlogic_eqn"); } |