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author | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 15:31:48 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 15:31:48 -0700 |
commit | 1b08f861b6f95dba561ec48f71d3ab5bc18f64f2 (patch) | |
tree | b08eebb56cfa49743504bfcb97d3778dedc13d9d /techlibs/anlogic | |
parent | 8d820a9884c0a58ee7817a2052d8b915578a7ba7 (diff) | |
parent | 52c4655de32c027e0542834d030ac951be10c8eb (diff) | |
download | yosys-1b08f861b6f95dba561ec48f71d3ab5bc18f64f2.tar.gz yosys-1b08f861b6f95dba561ec48f71d3ab5bc18f64f2.tar.bz2 yosys-1b08f861b6f95dba561ec48f71d3ab5bc18f64f2.zip |
Merge branch 'eddie/xilinx_srl' into xaig_arrival
Diffstat (limited to 'techlibs/anlogic')
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