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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-21 18:43:17 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-21 18:43:17 -0700 |
| commit | 7e7965ca7b3bbeb79cb70014da7bc48c08a74adb (patch) | |
| tree | 15030ecf9f8f0be8a553f744ed2a4322e999dc1a /techlibs/anlogic | |
| parent | ed7be3e6b68521b2f147034f811a19bd7af86d1a (diff) | |
| download | yosys-7e7965ca7b3bbeb79cb70014da7bc48c08a74adb.tar.gz yosys-7e7965ca7b3bbeb79cb70014da7bc48c08a74adb.tar.bz2 yosys-7e7965ca7b3bbeb79cb70014da7bc48c08a74adb.zip | |
Trim shiftx_width when upper bits are 1'bx
Diffstat (limited to 'techlibs/anlogic')
0 files changed, 0 insertions, 0 deletions