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| author | Eddie Hung <eddie@fpgeh.com> | 2020-05-18 08:06:50 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-18 08:06:50 -0700 |
| commit | 2d573a0ff680eb9f38358943fbf134f765ba1451 (patch) | |
| tree | f68589c127fcb0972636699b888252972ed63385 /techlibs/common/abc9_map.v | |
| parent | fa8cb3e35da68ceb55a9147bc1faacf68ad8bbfa (diff) | |
| parent | 67fc0c3698693f049e805211c49d6219f17d7c7d (diff) | |
| download | yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.tar.gz yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.tar.bz2 yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.zip | |
Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dff
abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
Diffstat (limited to 'techlibs/common/abc9_map.v')
| -rw-r--r-- | techlibs/common/abc9_map.v | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/techlibs/common/abc9_map.v b/techlibs/common/abc9_map.v new file mode 100644 index 000000000..6ed90b5f5 --- /dev/null +++ b/techlibs/common/abc9_map.v @@ -0,0 +1,27 @@ +`ifdef DFF +(* techmap_celltype = "$_DFF_N_ $_DFF_P_" *) +module $_DFF_x_(input C, D, output Q); + parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx; + parameter _TECHMAP_CELLTYPE_ = ""; + wire D_; + generate if (_TECHMAP_CELLTYPE_ == "$_DFF_N_") begin + if (_TECHMAP_WIREINIT_Q_ === 1'b0) begin + $__DFF_N__$abc9_flop _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_)); + $_DFF_N_ ff (.C(C), .D(D_), .Q(Q)); + end + else + (* abc9_keep *) $_DFF_N_ _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q)); + end + else if (_TECHMAP_CELLTYPE_ == "$_DFF_P_") begin + if (_TECHMAP_WIREINIT_Q_ === 1'b0) begin + $__DFF_P__$abc9_flop _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_)); + $_DFF_P_ ff (.C(C), .D(D_), .Q(Q)); + end + else + (* abc9_keep *) $_DFF_P_ _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q)); + end + else if (_TECHMAP_CELLTYPE_ != "") + $error("Unrecognised _TECHMAP_CELLTYPE_"); + endgenerate +endmodule +`endif |