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authorAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
committerAhmed Irfan <ahmedirfan1983@gmail.com>2014-09-22 11:35:04 +0200
commitd3c67ad9b61f602de1100cd264efd227dcacb417 (patch)
tree88c462c53bdab128cd1edbded42483772f82612a /techlibs/common/blackbox.sed
parentb783dbe148e6d246ebd107c0913de2989ab5af48 (diff)
parent13117bb346dd02d2345f716b4403239aebe3d0e2 (diff)
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Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
added case for memwr cell that is used in muxes (same cell is used more than one time) corrected bug for xnor and logic_not added pmux cell translation Conflicts: backends/btor/btor.cc
Diffstat (limited to 'techlibs/common/blackbox.sed')
-rw-r--r--techlibs/common/blackbox.sed5
1 files changed, 3 insertions, 2 deletions
diff --git a/techlibs/common/blackbox.sed b/techlibs/common/blackbox.sed
index 21693ecdd..db8900344 100644
--- a/techlibs/common/blackbox.sed
+++ b/techlibs/common/blackbox.sed
@@ -1,4 +1,5 @@
#!/bin/sed -r
-/^(wire|assign|reg|event)/ d;
-/^(genvar|generate|always|initial)/,/^end/ d;
+/^(wire|assign|reg|event|integer|localparam|\/\/|[\/ ]\*| *$|`)/ d;
+/^(genvar|generate|always|initial|task|function)/,/^end/ d;
+/^endmodule/ s/$/\n/;
s/ reg / /;