Merge branch 'master' of github.com:YosysHQ/yosys into firrtl_backend_fileinfo

1 files changed, 31 insertions, 19 deletions

diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index 64720e598..2bac78d38 100644
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -456,11 +456,16 @@ output Y;
 assign Y = E ? A : 1'bz;
 endmodule
 
+// NOTE: the following cell types are autogenerated.  DO NOT EDIT them manually,
+// instead edit the templates in gen_ff_types.py and rerun it.
+
+// START AUTOGENERATED CELL TYPES
+
 //  |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
 //-
 //-     $_SR_NN_ (S, R, Q)
 //-
-//- A set-reset latch with negative polarity SET and RESET.
+//- A set-reset latch with negative polarity SET and negative polarity RESET.
 //-
 //- Truth table:    S R | Q
 //-                -----+---
@@ -532,7 +537,7 @@ endmodule
 //-
 //-     $_SR_PP_ (S, R, Q)
 //-
-//- A set-reset latch with positive polarity SET and RESET.
+//- A set-reset latch with positive polarity SET and positive polarity RESET.
 //-
 //- Truth table:    S R | Q
 //-                -----+---
@@ -871,7 +876,8 @@ endmodule
 //-
 //-     $_DFFSR_NNN_ (C, S, R, D, Q)
 //-
-//- A negative edge D-type flip-flop with negative polarity set and reset.
+//- A negative edge D-type flip-flop with negative polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    C S R D | Q
 //-                ---------+---
@@ -951,7 +957,8 @@ endmodule
 //-
 //-     $_DFFSR_NPP_ (C, S, R, D, Q)
 //-
-//- A negative edge D-type flip-flop with positive polarity set and reset.
+//- A negative edge D-type flip-flop with positive polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    C S R D | Q
 //-                ---------+---
@@ -977,7 +984,8 @@ endmodule
 //-
 //-     $_DFFSR_PNN_ (C, S, R, D, Q)
 //-
-//- A positive edge D-type flip-flop with negative polarity set and reset.
+//- A positive edge D-type flip-flop with negative polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    C S R D | Q
 //-                ---------+---
@@ -1057,7 +1065,8 @@ endmodule
 //-
 //-     $_DFFSR_PPP_ (C, S, R, D, Q)
 //-
-//- A positive edge D-type flip-flop with positive polarity set and reset.
+//- A positive edge D-type flip-flop with positive polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    C S R D | Q
 //-                ---------+---
@@ -1123,7 +1132,8 @@ endmodule
 //-
 //-     $_DLATCHSR_NNN_ (E, S, R, D, Q)
 //-
-//- A negative enable D-type latch with negative polarity set and reset.
+//- A negative enable D-type latch with negative polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1149,8 +1159,8 @@ endmodule
 //-
 //-     $_DLATCHSR_NNP_ (E, S, R, D, Q)
 //-
-//- A negative enable D-type latch with negative polarity set and positive polarity
-//- reset.
+//- A negative enable D-type latch with negative polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1176,8 +1186,8 @@ endmodule
 //-
 //-     $_DLATCHSR_NPN_ (E, S, R, D, Q)
 //-
-//- A negative enable D-type latch with positive polarity set and negative polarity
-//- reset.
+//- A negative enable D-type latch with positive polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1203,7 +1213,8 @@ endmodule
 //-
 //-     $_DLATCHSR_NPP_ (E, S, R, D, Q)
 //-
-//- A negative enable D-type latch with positive polarity set and reset.
+//- A negative enable D-type latch with positive polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1229,7 +1240,8 @@ endmodule
 //-
 //-     $_DLATCHSR_PNN_ (E, S, R, D, Q)
 //-
-//- A positive enable D-type latch with negative polarity set and reset.
+//- A positive enable D-type latch with negative polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1255,8 +1267,8 @@ endmodule
 //-
 //-     $_DLATCHSR_PNP_ (E, S, R, D, Q)
 //-
-//- A positive enable D-type latch with negative polarity set and positive polarity
-//- reset.
+//- A positive enable D-type latch with negative polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1282,8 +1294,8 @@ endmodule
 //-
 //-     $_DLATCHSR_PPN_ (E, S, R, D, Q)
 //-
-//- A positive enable D-type latch with positive polarity set and negative polarity
-//- reset.
+//- A positive enable D-type latch with positive polarity set and negative
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1309,7 +1321,8 @@ endmodule
 //-
 //-     $_DLATCHSR_PPP_ (E, S, R, D, Q)
 //-
-//- A positive enable D-type latch with positive polarity set and reset.
+//- A positive enable D-type latch with positive polarity set and positive
+//- polarity reset.
 //-
 //- Truth table:    E S R D | Q
 //-                ---------+---
@@ -1330,4 +1343,3 @@ always @* begin
 		Q <= D;
 end
 endmodule
-