diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 14:50:00 -0700 |
| commit | 26cb3e7afc603b5aa703434c2cdfad444a4d4db0 (patch) | |
| tree | cb346623885c4bc1e98affc623084f58b0a87ce2 /techlibs/common | |
| parent | 09beeee38a5af767f70d24e86c976e43b1b27547 (diff) | |
| parent | 8110fb9266e685aaea48359a5aebc4e5ac865240 (diff) | |
| download | yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.gz yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.tar.bz2 yosys-26cb3e7afc603b5aa703434c2cdfad444a4d4db0.zip | |
Merge remote-tracking branch 'origin/master' into eddie/wreduce_add
Diffstat (limited to 'techlibs/common')
| -rw-r--r-- | techlibs/common/simcells.v | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v index 289673e82..64720e598 100644 --- a/techlibs/common/simcells.v +++ b/techlibs/common/simcells.v @@ -230,6 +230,25 @@ endmodule // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| //- +//- $_NMUX_ (A, B, S, Y) +//- +//- A 2-input inverting MUX gate. +//- +//- Truth table: A B S | Y +//- -------+--- +//- 0 - 0 | 1 +//- 1 - 0 | 0 +//- - 0 1 | 1 +//- - 1 1 | 0 +//- +module \$_NMUX_ (A, B, S, Y); +input A, B, S; +output Y; +assign Y = S ? !B : !A; +endmodule + +// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| +//- //- $_MUX4_ (A, B, C, D, S, T, Y) //- //- A 4-input MUX gate. |