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author | Robert Ou <rqou@robertou.com> | 2018-03-31 02:54:26 -0700 |
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committer | Robert Ou <rqou@robertou.com> | 2018-03-31 02:54:26 -0700 |
commit | 8fe9cdf36428b07ab22e9f831470e7e4c37978e2 (patch) | |
tree | 8e5e66b0a0869fd2c967817decfd06131c5e0ee2 /techlibs/coolrunner2/synth_coolrunner2.cc | |
parent | dd5fab69c135135fa46b6325a39c184a2ddc6156 (diff) | |
download | yosys-8fe9cdf36428b07ab22e9f831470e7e4c37978e2.tar.gz yosys-8fe9cdf36428b07ab22e9f831470e7e4c37978e2.tar.bz2 yosys-8fe9cdf36428b07ab22e9f831470e7e4c37978e2.zip |
coolrunner2: Add extraction for TFFs
Diffstat (limited to 'techlibs/coolrunner2/synth_coolrunner2.cc')
-rw-r--r-- | techlibs/coolrunner2/synth_coolrunner2.cc | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/techlibs/coolrunner2/synth_coolrunner2.cc b/techlibs/coolrunner2/synth_coolrunner2.cc index 183282629..5d9e3cc90 100644 --- a/techlibs/coolrunner2/synth_coolrunner2.cc +++ b/techlibs/coolrunner2/synth_coolrunner2.cc @@ -149,6 +149,16 @@ struct SynthCoolrunner2Pass : public ScriptPass run("dfflibmap -prepare -liberty +/coolrunner2/xc2_dff.lib"); } + if (check_label("map_tff")) + { + // This is quite hacky. By telling abc that it can only use AND and XOR gates, abc will try and use XOR + // gates "whenever possible." This will hopefully cause toggle flip-flop structures to turn into an XOR + // connected to a D flip-flop. We then match on these and convert them into XC2 TFF cells. + run("abc -g AND,XOR"); + run("clean"); + run("extract -map +/coolrunner2/tff_extract.v"); + } + if (check_label("map_pla")) { run("abc -sop -I 40 -P 56"); @@ -160,6 +170,8 @@ struct SynthCoolrunner2Pass : public ScriptPass run("dfflibmap -liberty +/coolrunner2/xc2_dff.lib"); run("dffinit -ff FDCP Q INIT"); run("dffinit -ff FDCP_N Q INIT"); + run("dffinit -ff FTCP Q INIT"); + run("dffinit -ff FTCP_N Q INIT"); run("dffinit -ff LDCP Q INIT"); run("dffinit -ff LDCP_N Q INIT"); run("coolrunner2_sop"); |