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| author | Aman Goel <amangoel@umich.edu> | 2019-09-27 12:30:27 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-09-27 12:30:27 -0400 |
| commit | cb0dc6e68b9432edc9c30c153954be53c8576911 (patch) | |
| tree | c137f970f949117d04632158d73bfe1f9c146e6f /techlibs/easic | |
| parent | 4d343fc1cdafe469484846051680ca0b1f948549 (diff) | |
| parent | 4b15cf5f76e2226bbce1a73d1e0ff54fbf093fe8 (diff) | |
| download | yosys-cb0dc6e68b9432edc9c30c153954be53c8576911.tar.gz yosys-cb0dc6e68b9432edc9c30c153954be53c8576911.tar.bz2 yosys-cb0dc6e68b9432edc9c30c153954be53c8576911.zip | |
Merge pull request #7 from YosysHQ/master
Syncing with official repo
Diffstat (limited to 'techlibs/easic')
| -rw-r--r-- | techlibs/easic/synth_easic.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/techlibs/easic/synth_easic.cc b/techlibs/easic/synth_easic.cc index e17138f3a..dd9e3dab7 100644 --- a/techlibs/easic/synth_easic.cc +++ b/techlibs/easic/synth_easic.cc @@ -29,7 +29,7 @@ struct SynthEasicPass : public ScriptPass { SynthEasicPass() : ScriptPass("synth_easic", "synthesis for eASIC platform") { } - virtual void help() YS_OVERRIDE + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -67,7 +67,7 @@ struct SynthEasicPass : public ScriptPass string top_opt, vlog_file, etools_path; bool flatten, retime; - virtual void clear_flags() YS_OVERRIDE + void clear_flags() YS_OVERRIDE { top_opt = "-auto-top"; vlog_file = ""; @@ -76,7 +76,7 @@ struct SynthEasicPass : public ScriptPass retime = false; } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { string run_from, run_to; clear_flags(); @@ -117,7 +117,7 @@ struct SynthEasicPass : public ScriptPass extra_args(args, argidx, design); if (!design->full_selection()) - log_cmd_error("This comannd only operates on fully selected designs!\n"); + log_cmd_error("This command only operates on fully selected designs!\n"); log_header(design, "Executing SYNTH_EASIC pass.\n"); log_push(); @@ -127,7 +127,7 @@ struct SynthEasicPass : public ScriptPass log_pop(); } - virtual void script() YS_OVERRIDE + void script() YS_OVERRIDE { string phys_clk_lib = stringf("%s/data_ruby28/design_libs/logical/timing/gp/n3x_phys_clk_0v893ff125c.lib", etools_path.c_str()); string logic_lut_lib = stringf("%s/data_ruby28/design_libs/logical/timing/gp/n3x_logic_lut_0v893ff125c.lib", etools_path.c_str()); |