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author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 16:58:55 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 16:58:55 -0700 |
commit | 7a45cd58566310f623bd567a393beb8a734ebf60 (patch) | |
tree | 3f97ec0e46c9f01db76e3f239140ce828b14b453 /techlibs/ecp5/abc9_5g.lut | |
parent | 549d6ea467bddba24cc0ee43597b5ab62eb476e7 (diff) | |
parent | aae2b9fd9c8dc915fadacc24962436dd7aedff36 (diff) | |
download | yosys-7a45cd58566310f623bd567a393beb8a734ebf60.tar.gz yosys-7a45cd58566310f623bd567a393beb8a734ebf60.tar.bz2 yosys-7a45cd58566310f623bd567a393beb8a734ebf60.zip |
Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dff
Diffstat (limited to 'techlibs/ecp5/abc9_5g.lut')
-rw-r--r-- | techlibs/ecp5/abc9_5g.lut | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/techlibs/ecp5/abc9_5g.lut b/techlibs/ecp5/abc9_5g.lut new file mode 100644 index 000000000..e8aa9b35d --- /dev/null +++ b/techlibs/ecp5/abc9_5g.lut @@ -0,0 +1,25 @@ +# ECP5-5G LUT library for ABC +# Note that ECP5 architecture assigns difference +# in LUT input delay to interconnect, so this is +# considered too + + +# Simple LUTs +# area D C B A +1 1 141 +2 1 141 275 +3 1 141 275 379 +4 1 141 275 379 379 + +# LUT5 = 2x LUT4 + PFUMX +# area M0 D C B A +5 2 151 239 373 477 477 + +# LUT6 = 2x LUT5 + MUX2 +# area M1 M0 D C B A +6 4 148 292 380 514 618 618 + +# LUT7 = 2x LUT6 + MUX2 +# area M2 M1 M0 D C B A +7 8 148 289 433 521 655 759 759 + |