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authorEddie Hung <eddie@fpgeh.com>2019-10-08 10:53:38 -0700
committerGitHub <noreply@github.com>2019-10-08 10:53:38 -0700
commit9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f (patch)
tree526027efe405ddd8741558d150a341478d269d1f /techlibs/ecp5/abc9_5g.lut
parent472b5d33a624c2e414ce733c1cda0b97bce24094 (diff)
parenta5ac33f230b5dd20273f6636e5b573ef0478b8f9 (diff)
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Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9
Rename abc_* names/attributes to more precisely be abc9_*
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diff --git a/techlibs/ecp5/abc9_5g.lut b/techlibs/ecp5/abc9_5g.lut
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+# ECP5-5G LUT library for ABC
+# Note that ECP5 architecture assigns difference
+# in LUT input delay to interconnect, so this is
+# considered too
+
+
+# Simple LUTs
+# area D C B A
+1 1 141
+2 1 141 275
+3 1 141 275 379
+4 1 141 275 379 379
+
+# LUT5 = 2x LUT4 + PFUMX
+# area M0 D C B A
+5 2 151 239 373 477 477
+
+# LUT6 = 2x LUT5 + MUX2
+# area M1 M0 D C B A
+6 4 148 292 380 514 618 618
+
+# LUT7 = 2x LUT6 + MUX2
+# area M2 M1 M0 D C B A
+7 8 148 289 433 521 655 759 759
+