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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-08 10:53:38 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-08 10:53:38 -0700 |
| commit | 9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f (patch) | |
| tree | 526027efe405ddd8741558d150a341478d269d1f /techlibs/ecp5/abc9_map.v | |
| parent | 472b5d33a624c2e414ce733c1cda0b97bce24094 (diff) | |
| parent | a5ac33f230b5dd20273f6636e5b573ef0478b8f9 (diff) | |
| download | yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.tar.gz yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.tar.bz2 yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.zip | |
Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9
Rename abc_* names/attributes to more precisely be abc9_*
Diffstat (limited to 'techlibs/ecp5/abc9_map.v')
| -rw-r--r-- | techlibs/ecp5/abc9_map.v | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/techlibs/ecp5/abc9_map.v b/techlibs/ecp5/abc9_map.v new file mode 100644 index 000000000..d8d70f9f6 --- /dev/null +++ b/techlibs/ecp5/abc9_map.v @@ -0,0 +1,24 @@ +// --------------------------------------- + +module TRELLIS_DPR16X4 ( + input [3:0] DI, + input [3:0] WAD, + input WRE, + input WCK, + input [3:0] RAD, + output [3:0] DO +); + parameter WCKMUX = "WCK"; + parameter WREMUX = "WRE"; + parameter [63:0] INITVAL = 64'h0000000000000000; + wire [3:0] \$DO ; + + TRELLIS_DPR16X4 #( + .WCKMUX(WCKMUX), .WREMUX(WREMUX), .INITVAL(INITVAL) + ) _TECHMAP_REPLACE_ ( + .DI(DI), .WAD(WAD), .WRE(WRE), .WCK(WCK), + .RAD(RAD), .DO(\$DO ) + ); + + \$__ABC9_DPR16X4_COMB do (.A(\$DO ), .S(RAD), .Y(DO)); +endmodule |