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authorEddie Hung <eddie@fpgeh.com>2020-04-02 09:51:32 -0700
committerEddie Hung <eddie@fpgeh.com>2020-04-02 09:51:32 -0700
commit956ecd48f71417b514c194a833a49238049e00b0 (patch)
tree468d55265c2549c86a8e7dfaf4ec0afffbd613bb /techlibs/ecp5/ecp5_gsr.cc
parent2d86563bb206748d6eef498eb27f7a004f20113d (diff)
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kernel: big fat patch to use more ID::*, otherwise ID(*)
Diffstat (limited to 'techlibs/ecp5/ecp5_gsr.cc')
-rw-r--r--techlibs/ecp5/ecp5_gsr.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/ecp5/ecp5_gsr.cc b/techlibs/ecp5/ecp5_gsr.cc
index 2bc714b6f..d1503f71f 100644
--- a/techlibs/ecp5/ecp5_gsr.cc
+++ b/techlibs/ecp5/ecp5_gsr.cc
@@ -85,7 +85,7 @@ struct Ecp5GsrPass : public Pass {
continue;
bool gsren = found_gsr;
- if (cell->get_bool_attribute("\\nogsr"))
+ if (cell->get_bool_attribute(ID(nogsr)))
gsren = false;
cell->setParam(ID(GSR), gsren ? Const("ENABLED") : Const("DISABLED"));
@@ -102,7 +102,7 @@ struct Ecp5GsrPass : public Pass {
{
if (cell->type != ID($_NOT_))
continue;
- SigSpec sig_a = cell->getPort(ID(A)), sig_y = cell->getPort(ID(Y));
+ SigSpec sig_a = cell->getPort(ID::A), sig_y = cell->getPort(ID::Y);
if (GetSize(sig_a) < 1 || GetSize(sig_y) < 1)
continue;
SigBit a = sigmap(sig_a[0]);