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| author | gatecat <gatecat@ds0.me> | 2021-12-07 13:41:39 +0000 |
|---|---|---|
| committer | myrtle <gatecat@ds0.me> | 2022-06-27 10:09:48 +0100 |
| commit | 38a24ec5cc3ae25d46a306bceb94244fad787a19 (patch) | |
| tree | 2fcc77f43fe2103fbe476217fce4d9329fe5b99a /techlibs/gatemate/inv_map.v | |
| parent | 7c756c9959b61160ea62b56c13c58371cb2b401c (diff) | |
| download | yosys-38a24ec5cc3ae25d46a306bceb94244fad787a19.tar.gz yosys-38a24ec5cc3ae25d46a306bceb94244fad787a19.tar.bz2 yosys-38a24ec5cc3ae25d46a306bceb94244fad787a19.zip | |
gatemate: Add LUT tree library script
Co-authored-by: Claire Xenia Wolf <claire@clairexen.net>
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'techlibs/gatemate/inv_map.v')
| -rw-r--r-- | techlibs/gatemate/inv_map.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/techlibs/gatemate/inv_map.v b/techlibs/gatemate/inv_map.v new file mode 100644 index 000000000..8a5051747 --- /dev/null +++ b/techlibs/gatemate/inv_map.v @@ -0,0 +1,4 @@ +// Any inverters not folded into LUTs are mapped to a LUT of their own +module \$__CC_NOT (input A, output Y); + CC_LUT1 #(.INIT(2'b01)) _TECHMAP_REPLACE_ (.I0(A), .O(Y)); +endmodule |