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author | Diego <dhdezr@gmail.com> | 2019-04-12 23:40:02 -0500 |
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committer | Diego <dhdezr@gmail.com> | 2019-04-12 23:40:02 -0500 |
commit | f9272fc56d7179f04a9f776bf056eedfc33dd358 (patch) | |
tree | 1ea10dcfaed907f0796965292bd11479db61e469 /techlibs/gowin/cells_map.v | |
parent | db1a5ec6a2a437b296e7ba9de78afaf3b440327f (diff) | |
download | yosys-f9272fc56d7179f04a9f776bf056eedfc33dd358.tar.gz yosys-f9272fc56d7179f04a9f776bf056eedfc33dd358.tar.bz2 yosys-f9272fc56d7179f04a9f776bf056eedfc33dd358.zip |
GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow
Diffstat (limited to 'techlibs/gowin/cells_map.v')
-rw-r--r-- | techlibs/gowin/cells_map.v | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/techlibs/gowin/cells_map.v b/techlibs/gowin/cells_map.v index e1f85effa..ebdc88a0a 100644 --- a/techlibs/gowin/cells_map.v +++ b/techlibs/gowin/cells_map.v @@ -1,5 +1,9 @@ module \$_DFF_N_ (input D, C, output Q); DFFN _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C)); endmodule -module \$_DFF_P_ (input D, C, output Q); DFF _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C)); endmodule +module \$_DFF_P_ #(parameter INIT = 1'b0) (input D, C, output Q); DFF #(.INIT(INIT)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C)); endmodule + +module \$__DFFS_PN0_ (input D, C, R, output Q); DFFR _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C), .RESET(!R)); endmodule +module \$__DFFS_PP0_ (input D, C, R, output Q); DFFR _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C), .RESET(R)); endmodule +module \$__DFFS_PP1_ (input D, C, R, output Q); DFFR _TECHMAP_REPLACE_ (.D(D), .Q(Q), .CLK(C), .RESET(R)); endmodule module \$lut (A, Y); parameter WIDTH = 0; |