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author | Eddie Hung <eddie@fpgeh.com> | 2020-05-18 08:06:50 -0700 |
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committer | GitHub <noreply@github.com> | 2020-05-18 08:06:50 -0700 |
commit | 2d573a0ff680eb9f38358943fbf134f765ba1451 (patch) | |
tree | f68589c127fcb0972636699b888252972ed63385 /techlibs/ice40/Makefile.inc | |
parent | fa8cb3e35da68ceb55a9147bc1faacf68ad8bbfa (diff) | |
parent | 67fc0c3698693f049e805211c49d6219f17d7c7d (diff) | |
download | yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.tar.gz yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.tar.bz2 yosys-2d573a0ff680eb9f38358943fbf134f765ba1451.zip |
Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dff
abc9: support seq synthesis when module has (* abc9_flop *) and bypass non-combinatorial (* abc9_box *)
Diffstat (limited to 'techlibs/ice40/Makefile.inc')
-rw-r--r-- | techlibs/ice40/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/ice40/Makefile.inc b/techlibs/ice40/Makefile.inc index b9e504a9d..1a8caf9a9 100644 --- a/techlibs/ice40/Makefile.inc +++ b/techlibs/ice40/Makefile.inc @@ -23,6 +23,7 @@ techlibs/ice40/brams_init3.vh: techlibs/ice40/brams_init.mk $(eval $(call add_share_file,share/ice40,techlibs/ice40/arith_map.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_map.v)) +$(eval $(call add_share_file,share/ice40,techlibs/ice40/ff_map.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_sim.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/latches_map.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt)) |