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| author | Miodrag Milanović <mmicko@gmail.com> | 2019-10-18 10:54:28 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-18 10:54:28 +0200 |
| commit | b4d765054897f7ee388b54d907fd8ce607db2d58 (patch) | |
| tree | a625838a0efbfb0176a57887c208467a7addd0a6 /techlibs/ice40/abc9_model.v | |
| parent | b659082e4a72209af62a19668800bb6334a437d7 (diff) | |
| parent | ab4899a2d02b994d79e4aa223eb743793b9a60b3 (diff) | |
| download | yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.tar.gz yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.tar.bz2 yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.zip | |
Merge branch 'master' into mmicko/efinix
Diffstat (limited to 'techlibs/ice40/abc9_model.v')
| -rw-r--r-- | techlibs/ice40/abc9_model.v | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/techlibs/ice40/abc9_model.v b/techlibs/ice40/abc9_model.v new file mode 100644 index 000000000..26cf6cc22 --- /dev/null +++ b/techlibs/ice40/abc9_model.v @@ -0,0 +1,27 @@ +(* abc9_box_id = 1, lib_whitebox *) +module \$__ICE40_CARRY_WRAPPER ( + (* abc9_carry *) + output CO, + output O, + input A, B, + (* abc9_carry *) + input CI, + input I0, I3 +); + parameter LUT = 0; + SB_CARRY carry ( + .I0(A), + .I1(B), + .CI(CI), + .CO(CO) + ); + SB_LUT4 #( + .LUT_INIT(LUT) + ) adder ( + .I0(I0), + .I1(A), + .I2(B), + .I3(I3), + .O(O) + ); +endmodule |