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author | Eddie Hung <eddie@fpgeh.com> | 2019-12-09 12:45:22 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-09 12:45:22 -0800 |
commit | 500ed9b501386b38faf6388b43c42abdbc0ee3ec (patch) | |
tree | b62f38613257e26e65a9c21999208cf5a3a5438c /techlibs/ice40/arith_map.v | |
parent | e05372778a26e5cbc5166f208eddc6a1b42ed198 (diff) | |
download | yosys-500ed9b501386b38faf6388b43c42abdbc0ee3ec.tar.gz yosys-500ed9b501386b38faf6388b43c42abdbc0ee3ec.tar.bz2 yosys-500ed9b501386b38faf6388b43c42abdbc0ee3ec.zip |
Sensitive to direct inst of $__ICE40_CARRY_WRAPPER; recreate SB_LUT4
Diffstat (limited to 'techlibs/ice40/arith_map.v')
-rw-r--r-- | techlibs/ice40/arith_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ice40/arith_map.v b/techlibs/ice40/arith_map.v index 26b24db9e..00a07247b 100644 --- a/techlibs/ice40/arith_map.v +++ b/techlibs/ice40/arith_map.v @@ -50,7 +50,7 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO); // A[2]: 1111 0000 1111 0000 // A[3]: 1111 1111 0000 0000 .LUT(16'b 0110_1001_1001_0110) - ) fadd ( + ) carry ( .A(AA[i]), .B(BB[i]), .CI(C[i]), |