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| author | Clifford Wolf <clifford@clifford.at> | 2015-04-24 00:06:50 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-04-24 00:06:50 +0200 |
| commit | d6f7698f591aa1957e263e13b66d0d808cf5a478 (patch) | |
| tree | fd9e91d00c95ffb5eb6c0cd1797acd151721b724 /techlibs/ice40/brams.txt | |
| parent | 11f77205f571cf4afb2ef3ba298444c2596cd81d (diff) | |
| download | yosys-d6f7698f591aa1957e263e13b66d0d808cf5a478.tar.gz yosys-d6f7698f591aa1957e263e13b66d0d808cf5a478.tar.bz2 yosys-d6f7698f591aa1957e263e13b66d0d808cf5a478.zip | |
Added ice40 bram support
Diffstat (limited to 'techlibs/ice40/brams.txt')
| -rw-r--r-- | techlibs/ice40/brams.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/techlibs/ice40/brams.txt b/techlibs/ice40/brams.txt new file mode 100644 index 000000000..5d23ad16b --- /dev/null +++ b/techlibs/ice40/brams.txt @@ -0,0 +1,40 @@ +bram $__ICE40_RAM4K_M0 + init 0 + abits 8 + dbits 16 + groups 2 + ports 1 1 + wrmode 0 1 + enable 0 16 + transp 0 0 + clocks 2 3 + clkpol 2 3 +endbram + +bram $__ICE40_RAM4K_M123 + init 0 + abits 9 @M1 + dbits 8 @M1 + abits 10 @M2 + dbits 4 @M2 + abits 11 @M3 + dbits 2 @M3 + groups 2 + ports 1 1 + wrmode 0 1 + enable 0 1 + transp 0 0 + clocks 2 3 + clkpol 2 3 +endbram + +match $__ICE40_RAM4K_M0 + min efficiency 10 + make_transp + or_next_if_better +endmatch + +match $__ICE40_RAM4K_M123 + min efficiency 10 + make_transp +endmatch |