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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-11 12:55:35 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-07-11 12:55:35 -0700 |
| commit | 19c1c3cfa351eb818065054ca6358006f38acb9c (patch) | |
| tree | 117b9185aa8de17a107d05060aef2885f9cea678 /techlibs/ice40/synth_ice40.cc | |
| parent | 931adbaf74a2e489e1adfe202ce583e979384e55 (diff) | |
| parent | ce250b341c912a3357b13259c1b0b6ed0a7b95a6 (diff) | |
| download | yosys-19c1c3cfa351eb818065054ca6358006f38acb9c.tar.gz yosys-19c1c3cfa351eb818065054ca6358006f38acb9c.tar.bz2 yosys-19c1c3cfa351eb818065054ca6358006f38acb9c.zip | |
Merge pull request #1182 from koriakin/xc6s-bram
synth_xilinx: Initial Spartan 6 block RAM inference support.
Diffstat (limited to 'techlibs/ice40/synth_ice40.cc')
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