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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-27 15:14:31 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-27 15:14:31 -0700 |
| commit | 8f5710c464b2b3b91f0c7f29a9420dcb798be4c5 (patch) | |
| tree | 59bde082cba0f8f76e0e297ed57980592df7e73b /techlibs/ice40/synth_ice40.cc | |
| parent | f1a206ba03c5b6fba2672754d09cc649a60beeb8 (diff) | |
| parent | fd0e3a2c43d96ba31beede9865d5000230029994 (diff) | |
| download | yosys-8f5710c464b2b3b91f0c7f29a9420dcb798be4c5.tar.gz yosys-8f5710c464b2b3b91f0c7f29a9420dcb798be4c5.tar.bz2 yosys-8f5710c464b2b3b91f0c7f29a9420dcb798be4c5.zip | |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'techlibs/ice40/synth_ice40.cc')
| -rw-r--r-- | techlibs/ice40/synth_ice40.cc | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index c6de81bd9..a3890268a 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -238,7 +238,14 @@ struct SynthIce40Pass : public ScriptPass { if (check_label("begin")) { - run("read_verilog -icells -lib +/ice40/cells_sim.v"); + std::string define; + if (device_opt == "lp") + define = "-D ICE40_LP"; + else if (device_opt == "u") + define = "-D ICE40_U"; + else + define = "-D ICE40_HX"; + run("read_verilog -icells " + define + " -lib +/ice40/cells_sim.v"); run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str())); run("proc"); } |