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authorEddie Hung <eddie@fpgeh.com>2019-07-19 08:52:49 -0700
committerEddie Hung <eddie@fpgeh.com>2019-07-19 08:52:49 -0700
commit171cd2ff738cdb8027b9b6efb988bab8744264a9 (patch)
treefe056c2bae9e50e473fead9345a40749dd4dcceb /techlibs/ice40/tests/test_dsp_model.sh
parentf7753720feaf466a089f4b96fca27ed4130b5be8 (diff)
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Add tests for all combinations of A and B signedness for comb mul
Diffstat (limited to 'techlibs/ice40/tests/test_dsp_model.sh')
-rw-r--r--techlibs/ice40/tests/test_dsp_model.sh5
1 files changed, 4 insertions, 1 deletions
diff --git a/techlibs/ice40/tests/test_dsp_model.sh b/techlibs/ice40/tests/test_dsp_model.sh
index 2d42c23ad..75f95ab29 100644
--- a/techlibs/ice40/tests/test_dsp_model.sh
+++ b/techlibs/ice40/tests/test_dsp_model.sh
@@ -6,7 +6,10 @@ if [ ! -f "test_dsp_model_ref.v" ]; then
fi
for tb in testbench \
testbench_comb_8x8_A testbench_comb_8x8_B testbench_comb_16x16 \
- testbench_seq_16x16_A testbench_seq_16x16_B
+ testbench_seq_16x16_A testbench_seq_16x16_B \
+ testbench_comb_8x8_A_signedA testbench_comb_8x8_A_signedB testbench_comb_8x8_A_signedAB \
+ testbench_comb_8x8_B_signedA testbench_comb_8x8_B_signedB testbench_comb_8x8_B_signedAB \
+ testbench_comb_16x16_B_signedA testbench_comb_16x16_B_signedB testbench_comb_16x16_B_signedAB
do
iverilog -s $tb -o test_dsp_model test_dsp_model.v test_dsp_model_uut.v test_dsp_model_ref.v
vvp -N ./test_dsp_model