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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-07-27 14:21:05 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-08-20 18:25:05 +0200 |
| commit | 034b9ec7161d67e861b1befcc4c550bff4481387 (patch) | |
| tree | ac014657358681ef44ebd669beacfc8820e3ba2f /techlibs/intel/Makefile.inc | |
| parent | d9dd8bc74803789835533b81c35c927a80f6c28f (diff) | |
| download | yosys-034b9ec7161d67e861b1befcc4c550bff4481387.tar.gz yosys-034b9ec7161d67e861b1befcc4c550bff4481387.tar.bz2 yosys-034b9ec7161d67e861b1befcc4c550bff4481387.zip | |
intel: move Cyclone V support to intel_alm
Diffstat (limited to 'techlibs/intel/Makefile.inc')
| -rw-r--r-- | techlibs/intel/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/Makefile.inc b/techlibs/intel/Makefile.inc index fef6aab77..0c4899f06 100644 --- a/techlibs/intel/Makefile.inc +++ b/techlibs/intel/Makefile.inc @@ -8,7 +8,7 @@ $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_ $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/ff_map.v)) # Add the cell models and mappings for the VQM backend -families := max10 arria10gx cyclonev cyclone10lp cycloneiv cycloneive +families := max10 arria10gx cyclone10lp cycloneiv cycloneive $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_sim.v))) $(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_map.v))) #$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v)) |