diff options
| author | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2019-02-26 10:28:42 -0800 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-02-28 14:58:11 -0800 |
| commit | e2fc18f27b5e9f506724a486787c2106b9f7fb4f (patch) | |
| tree | efab7457784570035c54d67045292f6cda2f1447 /techlibs/intel/cyclonev | |
| parent | 68a693717347cefc057cbf1a1c8d0f66500dec4f (diff) | |
| download | yosys-e2fc18f27b5e9f506724a486787c2106b9f7fb4f.tar.gz yosys-e2fc18f27b5e9f506724a486787c2106b9f7fb4f.tar.bz2 yosys-e2fc18f27b5e9f506724a486787c2106b9f7fb4f.zip | |
Reduce amount of trailing whitespace in code base
Diffstat (limited to 'techlibs/intel/cyclonev')
| -rw-r--r-- | techlibs/intel/cyclonev/cells_map.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/intel/cyclonev/cells_map.v b/techlibs/intel/cyclonev/cells_map.v index bd60d4e17..f8d142bc9 100644 --- a/techlibs/intel/cyclonev/cells_map.v +++ b/techlibs/intel/cyclonev/cells_map.v @@ -76,7 +76,7 @@ module \$lut (A, Y); wire VCC; wire GND; assign {VCC,GND} = {1'b1,1'b0}; - + generate if (WIDTH == 1) begin assign Y = ~A[0]; // Not need to spend 1 logic cell for such an easy function @@ -151,7 +151,7 @@ module \$lut (A, Y); TODO: There's not a just 7-input function on Cyclone V, see the following note: **Extended LUT Mode** Use extended LUT mode to implement a specific set of 7-input functions. The set must - be a 2-to-1 multiplexer fed by two arbitrary 5-input functions sharing four inputs. + be a 2-to-1 multiplexer fed by two arbitrary 5-input functions sharing four inputs. [source](Device Interfaces and Integration Basics for Cyclone V Devices). end*/ else |