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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-23 19:55:11 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-23 19:55:11 -0800 |
| commit | dca1c806eca0219fb609acfd111fbf9073c6908f (patch) | |
| tree | 785b2647c1e53dee0af1687cf03160aee7e04bdf /techlibs/intel/max10/cells_sim.v | |
| parent | 245873d42d7975b6c303c2d04b75f3cafc6c5697 (diff) | |
| download | yosys-dca1c806eca0219fb609acfd111fbf9073c6908f.tar.gz yosys-dca1c806eca0219fb609acfd111fbf9073c6908f.tar.bz2 yosys-dca1c806eca0219fb609acfd111fbf9073c6908f.zip | |
simple_abc9 tests to discard whitebox before write for sim
Diffstat (limited to 'techlibs/intel/max10/cells_sim.v')
0 files changed, 0 insertions, 0 deletions