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author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-07-27 14:21:05 +0100 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-08-20 18:25:05 +0200 |
commit | 034b9ec7161d67e861b1befcc4c550bff4481387 (patch) | |
tree | ac014657358681ef44ebd669beacfc8820e3ba2f /techlibs/intel_alm/Makefile.inc | |
parent | d9dd8bc74803789835533b81c35c927a80f6c28f (diff) | |
download | yosys-034b9ec7161d67e861b1befcc4c550bff4481387.tar.gz yosys-034b9ec7161d67e861b1befcc4c550bff4481387.tar.bz2 yosys-034b9ec7161d67e861b1befcc4c550bff4481387.zip |
intel: move Cyclone V support to intel_alm
Diffstat (limited to 'techlibs/intel_alm/Makefile.inc')
-rw-r--r-- | techlibs/intel_alm/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/intel_alm/Makefile.inc b/techlibs/intel_alm/Makefile.inc index e36c81c0e..da88762c4 100644 --- a/techlibs/intel_alm/Makefile.inc +++ b/techlibs/intel_alm/Makefile.inc @@ -14,6 +14,8 @@ $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/ds $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/dsp_map.v)) $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/mem_sim.v)) +$(eval $(call add_share_file,share/intel_alm/cyclonev,techlibs/intel_alm/cyclonev/cells_sim.v)) + # RAM $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m10k.txt)) $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m20k.txt)) |