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author | Lofty <dan.ravensloft@gmail.com> | 2022-03-09 16:40:32 +0000 |
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committer | gatecat <gatecat@ds0.me> | 2022-03-09 20:18:06 +0000 |
commit | 9f7a55c99ff179e503397b5c9929de7ca97fd793 (patch) | |
tree | 88d6e81cea45f30341a48a5cf25c7dc18c57ff9d /techlibs/intel_alm/Makefile.inc | |
parent | 4ccc2adbda523283997f273b0f182807ab07c0a9 (diff) | |
download | yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.tar.gz yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.tar.bz2 yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.zip |
intel_alm: M10K write-enable is negative-true
Diffstat (limited to 'techlibs/intel_alm/Makefile.inc')
-rw-r--r-- | techlibs/intel_alm/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/intel_alm/Makefile.inc b/techlibs/intel_alm/Makefile.inc index 614d5802c..b5f279a92 100644 --- a/techlibs/intel_alm/Makefile.inc +++ b/techlibs/intel_alm/Makefile.inc @@ -19,6 +19,7 @@ $(eval $(call add_share_file,share/intel_alm/cyclonev,techlibs/intel_alm/cyclone # RAM $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m10k.txt)) +$(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m10k_map.v)) $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m20k.txt)) $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/bram_m20k_map.v)) $(eval $(call add_share_file,share/intel_alm/common,techlibs/intel_alm/common/lutram_mlab.txt)) |