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author | Miodrag Milanovic <mmicko@gmail.com> | 2021-11-17 12:19:06 +0100 |
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committer | Miodrag Milanovic <mmicko@gmail.com> | 2021-11-17 12:19:06 +0100 |
commit | c081c683a4672aa6b6b35d4cc8142719dacb882c (patch) | |
tree | cfd193a711a070bb880535bfb8309489d64aca1d /techlibs/intel_alm/common/alm_sim.v | |
parent | 07dde32bf1c507767d3dc3992f5248aa99b0d34d (diff) | |
download | yosys-c081c683a4672aa6b6b35d4cc8142719dacb882c.tar.gz yosys-c081c683a4672aa6b6b35d4cc8142719dacb882c.tar.bz2 yosys-c081c683a4672aa6b6b35d4cc8142719dacb882c.zip |
Give initial wire unique ID, fixes #2914
Diffstat (limited to 'techlibs/intel_alm/common/alm_sim.v')
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