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| author | Lofty <dan.ravensloft@gmail.com> | 2022-03-09 16:40:32 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2022-03-09 20:18:06 +0000 |
| commit | 9f7a55c99ff179e503397b5c9929de7ca97fd793 (patch) | |
| tree | 88d6e81cea45f30341a48a5cf25c7dc18c57ff9d /techlibs/intel_alm/common/bram_m10k.txt | |
| parent | 4ccc2adbda523283997f273b0f182807ab07c0a9 (diff) | |
| download | yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.tar.gz yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.tar.bz2 yosys-9f7a55c99ff179e503397b5c9929de7ca97fd793.zip | |
intel_alm: M10K write-enable is negative-true
Diffstat (limited to 'techlibs/intel_alm/common/bram_m10k.txt')
| -rw-r--r-- | techlibs/intel_alm/common/bram_m10k.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/intel_alm/common/bram_m10k.txt b/techlibs/intel_alm/common/bram_m10k.txt index 0d9a49b7d..560711b65 100644 --- a/techlibs/intel_alm/common/bram_m10k.txt +++ b/techlibs/intel_alm/common/bram_m10k.txt @@ -1,4 +1,4 @@ -bram MISTRAL_M10K +bram $__MISTRAL_M10K init 0 # TODO: Re-enable when I figure out how BRAM init works abits 13 @D8192x1 dbits 1 @D8192x1 @@ -21,7 +21,7 @@ bram MISTRAL_M10K endbram -match MISTRAL_M10K +match $__MISTRAL_M10K min efficiency 5 make_transp endmatch |