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author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-07-26 19:28:10 +0100 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-27 15:39:06 +0200 |
commit | a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21 (patch) | |
tree | 11c29855676708a2260ad9174514b2ed450b36cf /techlibs/intel_alm/common/bram_m10k_map.v | |
parent | 62311b7ec0fc92fd78c38dd416551d460f1647a2 (diff) | |
download | yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.tar.gz yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.tar.bz2 yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.zip |
intel_alm: direct M10K instantiation
This reverts commit a3a90f6377f251d3b6c5898eb1543f8832493bb8.
Diffstat (limited to 'techlibs/intel_alm/common/bram_m10k_map.v')
-rw-r--r-- | techlibs/intel_alm/common/bram_m10k_map.v | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/techlibs/intel_alm/common/bram_m10k_map.v b/techlibs/intel_alm/common/bram_m10k_map.v deleted file mode 100644 index 061463c3e..000000000 --- a/techlibs/intel_alm/common/bram_m10k_map.v +++ /dev/null @@ -1,31 +0,0 @@ -module __MISTRAL_M10K_SDP(CLK1, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
-
-parameter CFG_ABITS = 10;
-parameter CFG_DBITS = 10;
-parameter CFG_ENABLE_A = 1;
-parameter CFG_ENABLE_B = 1;
-
-input CLK1;
-input [CFG_ABITS-1:0] A1ADDR, B1ADDR;
-input [CFG_DBITS-1:0] A1DATA;
-output [CFG_DBITS-1:0] B1DATA;
-input [CFG_ENABLE_A-1:0] A1EN, B1EN;
-
-altsyncram #(
- .operation_mode("dual_port"),
- .ram_block_type("m10k"),
- .widthad_a(CFG_ABITS),
- .width_a(CFG_DBITS),
- .widthad_b(CFG_ABITS),
- .width_b(CFG_DBITS),
-) _TECHMAP_REPLACE_ (
- .address_a(A1ADDR),
- .data_a(A1DATA),
- .wren_a(A1EN),
- .address_b(B1ADDR),
- .q_b(B1DATA),
- .clock0(CLK1),
- .clock1(CLK1)
-);
-
-endmodule
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