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author | gatecat <gatecat@ds0.me> | 2021-05-15 14:23:22 +0100 |
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committer | gatecat <gatecat@ds0.me> | 2021-05-15 22:37:06 +0100 |
commit | 5dba138c87762d4b5bb7b9348da372a92fab1cc0 (patch) | |
tree | 764f5d928b3e06b6a4884d5d1b14e4533003d18e /techlibs/intel_alm/common/misc_sim.v | |
parent | 3421979f00664443c77b0899d34438f979b4c51c (diff) | |
download | yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.tar.gz yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.tar.bz2 yosys-5dba138c87762d4b5bb7b9348da372a92fab1cc0.zip |
intel_alm: Add IO buffer insertion
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'techlibs/intel_alm/common/misc_sim.v')
-rw-r--r-- | techlibs/intel_alm/common/misc_sim.v | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/techlibs/intel_alm/common/misc_sim.v b/techlibs/intel_alm/common/misc_sim.v new file mode 100644 index 000000000..e9494a8ee --- /dev/null +++ b/techlibs/intel_alm/common/misc_sim.v @@ -0,0 +1,12 @@ +module MISTRAL_IB((* iopad_external_pin *) input PAD, output O); + assign O = PAD; +endmodule + +module MISTRAL_OB((* iopad_external_pin *) output PAD, input I); + assign PAD = I; +endmodule + +module MISTRAL_IO((* iopad_external_pin *) inout PAD, input I, input OE, output O); + assign PAD = OE ? I : 1'bz; + assign O = PAD; +endmodule |