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| author | Miodrag Milanovic <mmicko@gmail.com> | 2023-03-31 13:36:36 +0200 |
|---|---|---|
| committer | myrtle <gatecat@ds0.me> | 2023-04-06 09:10:14 +0200 |
| commit | 6e12da3956a1960ce62ba389b10f02ef21a43291 (patch) | |
| tree | a2b7f71d2ca9c6685a8acafb6b0adad9c33dd930 /techlibs/machxo2/cells_sim.v | |
| parent | 53c0a6b780199dc56348916acf7c00e30f65e1ec (diff) | |
| download | yosys-6e12da3956a1960ce62ba389b10f02ef21a43291.tar.gz yosys-6e12da3956a1960ce62ba389b10f02ef21a43291.tar.bz2 yosys-6e12da3956a1960ce62ba389b10f02ef21a43291.zip | |
machxo2: Initial support for carry chains (CCU2D)
Diffstat (limited to 'techlibs/machxo2/cells_sim.v')
| -rw-r--r-- | techlibs/machxo2/cells_sim.v | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/techlibs/machxo2/cells_sim.v b/techlibs/machxo2/cells_sim.v index 86fc0cd8e..f69c6d1e9 100644 --- a/techlibs/machxo2/cells_sim.v +++ b/techlibs/machxo2/cells_sim.v @@ -255,6 +255,26 @@ module DPR16X4C ( assign DO = ram[RAD]; endmodule +// --------------------------------------- +(* blackbox *) +module CCU2D ( + CIN, + A0, B0, C0, D0, + A1, B1, C1, D1, + S0, S1, COUT +); + +input CIN; +input A0, B0, C0, D0; +input A1, B1, C1, D1; +output S0, S1, COUT; + +parameter [15:0] INIT0 = 16'h0000; +parameter [15:0] INIT1 = 16'h0000; +parameter INJECT1_0 = "YES"; +parameter INJECT1_1 = "YES"; +endmodule + (* blackbox *) module DP8KC( input DIA8, DIA7, DIA6, DIA5, DIA4, DIA3, DIA2, DIA1, DIA0, |