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| author | Lofty <dan.ravensloft@gmail.com> | 2021-03-17 02:34:30 +0000 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-03-18 13:28:16 +0100 |
| commit | f4298b057ae0939b83283c8c7431097e71a32b62 (patch) | |
| tree | eedd3de21b55af0c2952fd8e730fb165c89fa8a3 /techlibs/quicklogic/pp3_lut_map.v | |
| parent | 8740fdf1d799fd8a3196bac28fe4e418e74f2acc (diff) | |
| download | yosys-f4298b057ae0939b83283c8c7431097e71a32b62.tar.gz yosys-f4298b057ae0939b83283c8c7431097e71a32b62.tar.bz2 yosys-f4298b057ae0939b83283c8c7431097e71a32b62.zip | |
quicklogic: PolarPro 3 support
Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
Diffstat (limited to 'techlibs/quicklogic/pp3_lut_map.v')
| -rw-r--r-- | techlibs/quicklogic/pp3_lut_map.v | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/techlibs/quicklogic/pp3_lut_map.v b/techlibs/quicklogic/pp3_lut_map.v new file mode 100644 index 000000000..4c375c9fd --- /dev/null +++ b/techlibs/quicklogic/pp3_lut_map.v @@ -0,0 +1,53 @@ +module \$lut ( + A, Y +); + parameter WIDTH = 0; + parameter LUT = 0; + + input [WIDTH-1:0] A; + output Y; + + generate + if (WIDTH == 1) begin + LUT1 #( + .EQN(""), + .INIT(LUT) + ) _TECHMAP_REPLACE_ ( + .O(Y), + .I0(A[0]) + ); + end else if (WIDTH == 2) begin + LUT2 #( + .EQN(""), + .INIT(LUT) + ) _TECHMAP_REPLACE_ ( + .O(Y), + .I0(A[0]), + .I1(A[1]) + ); + end else if (WIDTH == 3) begin + LUT3 #( + .EQN(""), + .INIT(LUT) + ) _TECHMAP_REPLACE_ ( + .O(Y), + .I0(A[0]), + .I1(A[1]), + .I2(A[2]) + ); + end else if (WIDTH == 4) begin + LUT4 #( + .EQN(""), + .INIT(LUT) + ) _TECHMAP_REPLACE_ ( + .O(Y), + .I0(A[0]), + .I1(A[1]), + .I2(A[2]), + .I3(A[3]) + ); + end else begin + wire _TECHMAP_FAIL_ = 1; + end + endgenerate +endmodule |