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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-11 11:38:49 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
| commit | 0e7c55e2a73f47d7f179d434ba79dd9e2bf9045b (patch) | |
| tree | 153bf13f2752a2501e49bef6d3166a83bc26aa22 /techlibs/xilinx/Makefile.inc | |
| parent | 3d6603792dbd36ccb572403815b78121a7ad80e8 (diff) | |
| download | yosys-0e7c55e2a73f47d7f179d434ba79dd9e2bf9045b.tar.gz yosys-0e7c55e2a73f47d7f179d434ba79dd9e2bf9045b.tar.bz2 yosys-0e7c55e2a73f47d7f179d434ba79dd9e2bf9045b.zip | |
Auto-generate .box/.lut files from specify blocks
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
| -rw-r--r-- | techlibs/xilinx/Makefile.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index d07bae12a..9984290a6 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -57,9 +57,6 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_dsp_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_unmap.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_model.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.box)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.lut)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7_nowide.lut)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) |