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| author | N. Engelhardt <nak@symbioticeda.com> | 2019-10-17 21:33:54 +0200 |
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| committer | N. Engelhardt <nak@symbioticeda.com> | 2019-10-17 21:33:54 +0200 |
| commit | 3b405d985e789ecf0082f724d2d62d3752e4b60c (patch) | |
| tree | 22bc7aea6e7df31a45e2754e14e26a76f8d83423 /techlibs/xilinx/Makefile.inc | |
| parent | 0d037bf9d8d866239de15d72dc8c5acd7ab5e5cf (diff) | |
| download | yosys-3b405d985e789ecf0082f724d2d62d3752e4b60c.tar.gz yosys-3b405d985e789ecf0082f724d2d62d3752e4b60c.tar.bz2 yosys-3b405d985e789ecf0082f724d2d62d3752e4b60c.zip | |
Call memory_dff before DSP mapping to reserve registers (fixes #1447)
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
0 files changed, 0 insertions, 0 deletions