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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 16:58:55 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 16:58:55 -0700 |
| commit | 7a45cd58566310f623bd567a393beb8a734ebf60 (patch) | |
| tree | 3f97ec0e46c9f01db76e3f239140ce828b14b453 /techlibs/xilinx/Makefile.inc | |
| parent | 549d6ea467bddba24cc0ee43597b5ab62eb476e7 (diff) | |
| parent | aae2b9fd9c8dc915fadacc24962436dd7aedff36 (diff) | |
| download | yosys-7a45cd58566310f623bd567a393beb8a734ebf60.tar.gz yosys-7a45cd58566310f623bd567a393beb8a734ebf60.tar.bz2 yosys-7a45cd58566310f623bd567a393beb8a734ebf60.zip | |
Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dff
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
| -rw-r--r-- | techlibs/xilinx/Makefile.inc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index ae82311a9..0ae67d9e7 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -44,12 +44,12 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/mux_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/dsp_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_unmap.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_model.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7_nowide.lut)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_unmap.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_model.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.box)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.lut)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7_nowide.lut)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) |