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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-08 10:53:38 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-08 10:53:38 -0700 |
| commit | 9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f (patch) | |
| tree | 526027efe405ddd8741558d150a341478d269d1f /techlibs/xilinx/Makefile.inc | |
| parent | 472b5d33a624c2e414ce733c1cda0b97bce24094 (diff) | |
| parent | a5ac33f230b5dd20273f6636e5b573ef0478b8f9 (diff) | |
| download | yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.tar.gz yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.tar.bz2 yosys-9fd2ddb14c0f7c40f6ed01a5db61cb6b327d877f.zip | |
Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9
Rename abc_* names/attributes to more precisely be abc9_*
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
| -rw-r--r-- | techlibs/xilinx/Makefile.inc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index ae82311a9..0ae67d9e7 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -44,12 +44,12 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/mux_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/dsp_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_unmap.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_model.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7_nowide.lut)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_unmap.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_model.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.box)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7.lut)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_xc7_nowide.lut)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) |