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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-05 18:59:40 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-05 18:59:40 +0100 |
| commit | 0671ae7d79ead3f7c109ed41ea7ad5e5767f418a (patch) | |
| tree | eff88fad0d90d4a6fd92c6ebda512d5bc010dc2b /techlibs/xilinx/abc9_xc7.box | |
| parent | 34d2fbd2f96a8789aa7eb655318308e11949eb7a (diff) | |
| parent | 21ce1b37fbc93562942c10f631c7f415f8fdba2e (diff) | |
| download | yosys-0671ae7d79ead3f7c109ed41ea7ad5e5767f418a.tar.gz yosys-0671ae7d79ead3f7c109ed41ea7ad5e5767f418a.tar.bz2 yosys-0671ae7d79ead3f7c109ed41ea7ad5e5767f418a.zip | |
Merge pull request #1661 from YosysHQ/eddie/abc9_required
abc9: add support for required times
Diffstat (limited to 'techlibs/xilinx/abc9_xc7.box')
| -rw-r--r-- | techlibs/xilinx/abc9_xc7.box | 61 |
1 files changed, 0 insertions, 61 deletions
diff --git a/techlibs/xilinx/abc9_xc7.box b/techlibs/xilinx/abc9_xc7.box index 13f4f0e61..48d492801 100644 --- a/techlibs/xilinx/abc9_xc7.box +++ b/techlibs/xilinx/abc9_xc7.box @@ -62,67 +62,6 @@ $__ABC9_ASYNC1 1001 1 2 1 #A S 0 764 # Y -# Flop boxes: -# * Max delays from https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L237-L251 -# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L265-L277 -# * Exception: $abc9_currQ is a special input (located last) necessary for clock-enable functionality - -# Box 1100 : FDRE -# name ID w/b ins outs -FDRE 1100 1 5 1 -#C CE D R $abc9_currQ -#0 109 -46 404 0 -0 109 0 404 0 # Q (-46ps Tsu clamped to 0) - -# Box 1101 : FDRE_1 -# name ID w/b ins outs -FDRE_1 1101 1 5 1 -#C CE D R $abc9_currQ -#0 109 -46 404 0 -0 109 0 404 0 # Q (-46ps Tsu clamped to 0) - -# Box 1102 : FDSE -# name ID w/b ins outs -FDSE 1102 1 5 1 -#C CE D R $abc9_currQ -#0 109 -46 404 0 -0 109 0 404 0 # Q (-46ps Tsu clamped to 0) - -# Box 1103 : FDSE_1 -# name ID w/b ins outs -FDSE_1 1103 1 5 1 -#C CE D R $abc9_currQ -#0 109 -46 404 0 -0 109 0 404 0 # Q (-46ps Tsu clamped to 0) - -# Box 1104 : FDCE -# name ID w/b ins outs -FDCE 1104 1 5 1 -#C CE CLR D $abc9_currQ -#0 109 764 -46 0 -0 109 764 0 0 # Q (-46ps Tsu clamped to 0) - -# Box 1105 : FDCE_1 -# name ID w/b ins outs -FDCE_1 1105 1 5 1 -#C CE CLR D $abc9_currQ -#0 109 764 -46 0 -0 109 764 0 0 # Q (-46ps Tsu clamped to 0) - -# Box 1106 : FDPE -# name ID w/b ins outs -FDPE 1106 1 5 1 -#C CE D PRE $abc9_currQ -#0 109 -46 764 0 -0 109 0 764 0 # Q (-46ps Tsu clamped to 0) - -# Box 1107 : FDPE_1 -# name ID w/b ins outs -FDPE_1 1107 1 5 1 -#C CE D PRE $abc9_currQ -#0 109 -46 764 0 -0 109 0 764 0 # Q (-46ps Tsu clamped to 0) - # Box 2000 : $__ABC9_LUT6 # (private cell to emulate async behaviour of LUTRAMs) # SLICEM/A6LUT |