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| author | Miodrag Milanović <mmicko@gmail.com> | 2019-10-18 10:53:56 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-18 10:53:56 +0200 |
| commit | 66fca65b58bfb944cad45da5836613726498e4b7 (patch) | |
| tree | a78b5d92952ea9f95623bb3daf8028d2402d023b /techlibs/xilinx/abc9_xc7.lut | |
| parent | 46af9a0ff7727c2d47b1dc12501e3328cba1f2e9 (diff) | |
| parent | 5ffb0053ec7d53ffc5c57e3277bfbab5d3fddb54 (diff) | |
| download | yosys-66fca65b58bfb944cad45da5836613726498e4b7.tar.gz yosys-66fca65b58bfb944cad45da5836613726498e4b7.tar.bz2 yosys-66fca65b58bfb944cad45da5836613726498e4b7.zip | |
Merge branch 'master' into mmicko/anlogic
Diffstat (limited to 'techlibs/xilinx/abc9_xc7.lut')
| -rw-r--r-- | techlibs/xilinx/abc9_xc7.lut | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/techlibs/xilinx/abc9_xc7.lut b/techlibs/xilinx/abc9_xc7.lut new file mode 100644 index 000000000..bcbdec127 --- /dev/null +++ b/techlibs/xilinx/abc9_xc7.lut @@ -0,0 +1,15 @@ +# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/timings/CLBLL_L.sdf +# and https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/tile_type_CLBLL_L.json + +# K area delay +1 1 127 +2 2 127 238 +3 3 127 238 407 +4 3 127 238 407 472 +5 3 127 238 407 472 631 +6 5 127 238 407 472 631 642 + # (F7[AB]MUX.S + [AC]OUTMUX) / 2 +7 10 464 513 624 793 858 1017 1028 + # F8MUX.S+BOUTMUX + # F8MUX.I0+F7MUX.S+BOUTMUX +8 20 468 585 634 745 914 979 1138 1149 |