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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 11:04:10 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 11:04:10 -0700 |
| commit | aae2b9fd9c8dc915fadacc24962436dd7aedff36 (patch) | |
| tree | 38ec98224113556a8a5a6d93d5bc2c0cb506286e /techlibs/xilinx/abc9_xc7_nowide.lut | |
| parent | 9fef1df3c1431cff2e097a10a502f77f04986a60 (diff) | |
| download | yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.tar.gz yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.tar.bz2 yosys-aae2b9fd9c8dc915fadacc24962436dd7aedff36.zip | |
Rename abc_* names/attributes to more precisely be abc9_*
Diffstat (limited to 'techlibs/xilinx/abc9_xc7_nowide.lut')
| -rw-r--r-- | techlibs/xilinx/abc9_xc7_nowide.lut | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/techlibs/xilinx/abc9_xc7_nowide.lut b/techlibs/xilinx/abc9_xc7_nowide.lut new file mode 100644 index 000000000..fab48c879 --- /dev/null +++ b/techlibs/xilinx/abc9_xc7_nowide.lut @@ -0,0 +1,10 @@ +# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/timings/CLBLL_L.sdf +# and https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/tile_type_CLBLL_L.json + +# K area delay +1 1 127 +2 2 127 238 +3 3 127 238 407 +4 3 127 238 407 472 +5 3 127 238 407 472 631 +6 5 127 238 407 472 631 642 |