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| author | Miodrag Milanović <mmicko@gmail.com> | 2019-10-18 10:54:28 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-18 10:54:28 +0200 |
| commit | b4d765054897f7ee388b54d907fd8ce607db2d58 (patch) | |
| tree | a625838a0efbfb0176a57887c208467a7addd0a6 /techlibs/xilinx/abc9_xc7_nowide.lut | |
| parent | b659082e4a72209af62a19668800bb6334a437d7 (diff) | |
| parent | ab4899a2d02b994d79e4aa223eb743793b9a60b3 (diff) | |
| download | yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.tar.gz yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.tar.bz2 yosys-b4d765054897f7ee388b54d907fd8ce607db2d58.zip | |
Merge branch 'master' into mmicko/efinix
Diffstat (limited to 'techlibs/xilinx/abc9_xc7_nowide.lut')
| -rw-r--r-- | techlibs/xilinx/abc9_xc7_nowide.lut | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/techlibs/xilinx/abc9_xc7_nowide.lut b/techlibs/xilinx/abc9_xc7_nowide.lut new file mode 100644 index 000000000..fab48c879 --- /dev/null +++ b/techlibs/xilinx/abc9_xc7_nowide.lut @@ -0,0 +1,10 @@ +# Max delays from https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/timings/CLBLL_L.sdf +# and https://github.com/SymbiFlow/prjxray-db/blob/82bf5f158cd8e9a11ac4d04f1aeef48ed1a528a5/artix7/tile_type_CLBLL_L.json + +# K area delay +1 1 127 +2 2 127 238 +3 3 127 238 407 +4 3 127 238 407 472 +5 3 127 238 407 472 631 +6 5 127 238 407 472 631 642 |