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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 23:05:28 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 23:05:28 -0700 |
| commit | 158325956e6bf711137e6198fb88e95a1e6250b9 (patch) | |
| tree | 274d38a57805df66a212a023df717304e0d125d0 /techlibs/xilinx/brams_init.py | |
| parent | 3825068a75b2d7ccb0953c92040474f95274b76a (diff) | |
| download | yosys-158325956e6bf711137e6198fb88e95a1e6250b9.tar.gz yosys-158325956e6bf711137e6198fb88e95a1e6250b9.tar.bz2 yosys-158325956e6bf711137e6198fb88e95a1e6250b9.zip | |
Realistic delays for RAM32X1D too
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