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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-16 14:05:50 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-16 14:05:50 -0700 |
| commit | 5d1ce043812b9b86ee3c3588c430ea1cd57fee1e (patch) | |
| tree | b2a23e48dd700caf597d1e8e96dc6e3c4240c2f0 /techlibs/xilinx/brams_init.py | |
| parent | fd5b3593d8496578c0879fc024bf81737be3702f (diff) | |
| download | yosys-5d1ce043812b9b86ee3c3588c430ea1cd57fee1e.tar.gz yosys-5d1ce043812b9b86ee3c3588c430ea1cd57fee1e.tar.bz2 yosys-5d1ce043812b9b86ee3c3588c430ea1cd57fee1e.zip | |
Add support for {A,B,P}REG in DSP48E1
Diffstat (limited to 'techlibs/xilinx/brams_init.py')
0 files changed, 0 insertions, 0 deletions