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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-14 09:01:48 -0700 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-03-14 09:01:48 -0700 |
| commit | 8af9979aab5f1434ee7d0e56a85324d78e2fd9f9 (patch) | |
| tree | 0e5da02f25f876ee01e6adb4947bcd5106bdc439 /techlibs/xilinx/brams_init.py | |
| parent | f1a8e8a480a7a88835b02abafd27c03e90de7041 (diff) | |
| download | yosys-8af9979aab5f1434ee7d0e56a85324d78e2fd9f9.tar.gz yosys-8af9979aab5f1434ee7d0e56a85324d78e2fd9f9.tar.bz2 yosys-8af9979aab5f1434ee7d0e56a85324d78e2fd9f9.zip | |
Revert "Add shregmap -init_msb_first and use in synth_xilinx"
This reverts commit 26ecbc1aee1dca1c186ab2b51835d74f67bc3e75.
Diffstat (limited to 'techlibs/xilinx/brams_init.py')
0 files changed, 0 insertions, 0 deletions