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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-23 18:14:06 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-23 18:14:06 -0700 |
| commit | ee9f6e6243cbea9efbd0f1b0a236e33ac6a0450e (patch) | |
| tree | 3ba26e0e0e9e75eb5da8e8e22984c02f650f5bb0 /techlibs/xilinx/brams_init.py | |
| parent | 70ce3d067010d67154c3cd5437caa16b4c8ca195 (diff) | |
| download | yosys-ee9f6e6243cbea9efbd0f1b0a236e33ac6a0450e.tar.gz yosys-ee9f6e6243cbea9efbd0f1b0a236e33ac6a0450e.tar.bz2 yosys-ee9f6e6243cbea9efbd0f1b0a236e33ac6a0450e.zip | |
Also add first.Q to chain_bits since variable length
Diffstat (limited to 'techlibs/xilinx/brams_init.py')
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