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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-06 23:22:52 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-06 23:22:52 -0800 |
| commit | a46a7e8a678a410292bbab061d1b96254fa7701d (patch) | |
| tree | 07ed33e9e84c10c415165f05f1d2001fad7ddfc9 /techlibs/xilinx/cells_map.v | |
| parent | ab667d3d47ceb07a41b571517b4effb0f4a4bf0b (diff) | |
| parent | ecb0c68f0751b3bd97f8da94e7bd2258987d58e1 (diff) | |
| download | yosys-a46a7e8a678a410292bbab061d1b96254fa7701d.tar.gz yosys-a46a7e8a678a410292bbab061d1b96254fa7701d.tar.bz2 yosys-a46a7e8a678a410292bbab061d1b96254fa7701d.zip | |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index a15884ec4..de2068bc5 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -363,3 +363,11 @@ module \$__XILINX_MUXF78 (O, I0, I1, I2, I3, S0, S1); else MUXF8 mux8 (.I0(T0), .I1(T1), .S(S1), .O(O)); endmodule + +module \$__XILINX_TINOUTPAD (input I, OE, output O, inout IO); + IOBUF _TECHMAP_REPLACE_ (.I(I), .O(O), .T(~OE), .IO(IO)); +endmodule + +module \$__XILINX_TOUTPAD (input I, OE, output O); + OBUFT _TECHMAP_REPLACE_ (.I(I), .O(O), .T(~OE)); +endmodule |