diff options
| author | Diego H <diego@symbioticeda.com> | 2019-12-12 13:40:05 -0600 |
|---|---|---|
| committer | Diego H <diego@symbioticeda.com> | 2019-12-12 13:40:05 -0600 |
| commit | ab6ac8327f28b2ba9530c81cdbb5091a1ef91032 (patch) | |
| tree | 9e2716d6d621eeeda85896b7b2993de517bb931a /techlibs/xilinx/cells_map.v | |
| parent | 3a5a65829cc593965304537ddcb4d6d1d3e3ca8b (diff) | |
| parent | 2666482282421bb54213ba01054111eadc401373 (diff) | |
| download | yosys-ab6ac8327f28b2ba9530c81cdbb5091a1ef91032.tar.gz yosys-ab6ac8327f28b2ba9530c81cdbb5091a1ef91032.tar.bz2 yosys-ab6ac8327f28b2ba9530c81cdbb5091a1ef91032.zip | |
Merge https://github.com/YosysHQ/yosys into bram_xilinx
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index a15884ec4..de2068bc5 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -363,3 +363,11 @@ module \$__XILINX_MUXF78 (O, I0, I1, I2, I3, S0, S1); else MUXF8 mux8 (.I0(T0), .I1(T1), .S(S1), .O(O)); endmodule + +module \$__XILINX_TINOUTPAD (input I, OE, output O, inout IO); + IOBUF _TECHMAP_REPLACE_ (.I(I), .O(O), .T(~OE), .IO(IO)); +endmodule + +module \$__XILINX_TOUTPAD (input I, OE, output O); + OBUFT _TECHMAP_REPLACE_ (.I(I), .O(O), .T(~OE)); +endmodule |