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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 16:16:50 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-24 16:16:50 -0700 |
| commit | efd04880dbeb2021c503c82ad962fe8c5d6802d4 (patch) | |
| tree | 0d2f1d1c8c211d24b2d3f1878b7c70f4bd98997f /techlibs/xilinx/cells_map.v | |
| parent | fb8fab4a29e5a3978cadf2b1bd8920b772150028 (diff) | |
| download | yosys-efd04880dbeb2021c503c82ad962fe8c5d6802d4.tar.gz yosys-efd04880dbeb2021c503c82ad962fe8c5d6802d4.tar.bz2 yosys-efd04880dbeb2021c503c82ad962fe8c5d6802d4.zip | |
Add RAM32X1D support
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
0 files changed, 0 insertions, 0 deletions