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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-12 08:50:39 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-12 08:50:39 -0700 |
| commit | f7a9769c140f6a56e51d7384dfd8e76bf2aef66d (patch) | |
| tree | 4be49b8b30a03ac7d4deafaa7318de275d5c3a7f /techlibs/xilinx/cells_map.v | |
| parent | ac2aff9e28a087a9a2697cd6ccf754af738903a7 (diff) | |
| parent | a91ea6612a73568782c80bd12ce2875353e2b5c5 (diff) | |
| download | yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.tar.gz yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.tar.bz2 yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.zip | |
Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index 704ab21b1..40789ddbe 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -17,6 +17,16 @@ * */ +// Convert negative-polarity reset to positive-polarity +(* techmap_celltype = "$_DFF_NN0_" *) +module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN0_" *) +module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_NN1_" *) +module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN1_" *) +module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule + module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; parameter [DEPTH-1:0] INIT = 0; |