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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-12-18 20:51:26 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-12-21 05:34:26 +0100 |
| commit | 5ffb676fa9505f6be846cb5bcf99bfeb628337f7 (patch) | |
| tree | 55280806393bba0bc008f8404d3aa3c280b9278f /techlibs/xilinx/cells_xtra.py | |
| parent | a679a761b51ca67b61dc8b2c7316949b41ef9dd2 (diff) | |
| download | yosys-5ffb676fa9505f6be846cb5bcf99bfeb628337f7.tar.gz yosys-5ffb676fa9505f6be846cb5bcf99bfeb628337f7.tar.bz2 yosys-5ffb676fa9505f6be846cb5bcf99bfeb628337f7.zip | |
xilinx: Regenerate cells_xtra.v using Vivado 2020.2
Diffstat (limited to 'techlibs/xilinx/cells_xtra.py')
| -rw-r--r-- | techlibs/xilinx/cells_xtra.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_xtra.py b/techlibs/xilinx/cells_xtra.py index 4eb8ddb19..c7ffb94cf 100644 --- a/techlibs/xilinx/cells_xtra.py +++ b/techlibs/xilinx/cells_xtra.py @@ -664,6 +664,7 @@ if __name__ == '__main__': dirs = [ os.path.join(args.vivado_dir, 'data/verilog/src/xeclib'), + os.path.join(args.vivado_dir, 'data/verilog/src/unisims'), os.path.join(args.vivado_dir, 'data/verilog/src/retarget'), os.path.join(args.ise_dir, 'ISE_DS/ISE/verilog/xeclib/unisims'), ] |